As the amount of functionality built into field programmable gate arrays (FPGAs) increases and as electronic systems increase in throughput and signaling speed, the amount of information flowing into and out of FPGAs has increased. It is envisioned that soon many FPGA devices will be input/output (I/O) limited or the operation of the FPGA devices will be hampered by inadequate capacity to get information into and out of the FPGA package. Future FPGA devices may be I/O limited both in terms of not having enough space at the periphery of the FPGA die to accommodate additional I/O functionality, and in terms of the speed of the on-chip I/O facilities being too slow to communicate the desired amount of information in the amount of time available.
FPGAs see increasing use in networking applications. A networking application may, for example, involve a printed circuit board that has a connector by which circuitry on the printed circuit board communicates with circuitry on a motherboard or main panel or back panel. Such a printed circuit board may, for example, be called a line card. One or more fiber optic connector jacks are typically provided on the optical line card. External fiber optic cables carrying network communications plug into the fiber optic connector jacks on the line card. Networking information flows from the fiber optic cable, through the fiber optic connector and onto the line card, through an optical-to-electrical transceiver on the line card, through other interface circuitry on the line card such as a serializer/deserializer (SERDES), and to the FPGA. In the other direction, information flows from the FPGA, through the SERDES, through an electrical-to-optical transceiver, through the fiber optic connector, and into the external fiber optic cable.
Typically each of the optical transceiver devices, the SERDES devices, and other intervening devices is packaged in its own package. These devices are therefore interconnected by relatively large electrical conductors and circuit board traces. High speed switching on these conductors in combination with the relatively large parasitic capacitance and inductances of these conductors results in an undesirably large amount of power consumption.
In addition to high power consumption, the design of the printed circuit board traces used to communicate information between these devices may be a daunting and time-consuming task for many FPGA users. High speed printed circuit board design can involve complex considerations and problems.
In addition to the difficulties associated with high speed printed circuit board design, disposing each of the various devices in its own separate package increases the aggregate packaging cost involved in realizing the system.
Not only are fiber optic communications desirable to interface an FPGA to a network such as in the line card example described above, but fiber optic communications are also desirable for other reasons. For example, there are situations where multiple large and high speed FPGAs are to be used together to realize a fairly complex system on a single printed circuit board. It may be desirable to communicate a large number of signals between these FPGAs at a high speed. The task of designing a great many high speed communication paths between the two FPGAs may be a difficult and time-consuming task. If a complex multi-layer printed circuit board is used for this purpose, the communication paths realized as traces on the printed circuit board are inflexible. If a path is to be changed, then a trace on the printed circuit board will have to be changed and the printed circuit board may have to be refabricated. The use of a printed circuit board to make large numbers of independent communication channels between such FPGAs is, therefore, be cumbersome. A solution to this problem is desired.
U.S. Pat. No. 6,364,542 illustrates an optoelectronic module that is fixed by an adhesive to the top of an integrated circuit package. The module contains optoelectronic devices such as, for example, a laser diode and a photodetector. The optoelectronic devices within the module communicate electrically with the central core of an integrated circuit in the package below via bond balls and associated posts that extend up from the integrated circuit in the package, through the integrated circuit package, through the base of the module, and to the optoelectronic devices. An external connector of a fiber optic cable snaps onto the module such that light from one fiber of the cable is transmitted onto the photodetector and such that light generated by the laser diode is transmitted to another fiber of the cable.
Although the package disclosed in U.S. Pat. No. 6,364,542 may be suitable for certain applications, fabrication and assembly of the integrated circuit package may be restrictively complex. If the clearance between the top of the integrated circuit die and the bottom inside surface of the package is too small, then the bond balls used to make contact with the integrated circuit may actually damage the integrated circuit die. If the clearance is too great, then adequate and repeatable contact between the bond balls and the integrated circuit may not be made. Moreover, the assembly involves placing the optoelectronic devices in a relatively small module and then electrically connecting the optoelectronic devices within the module to the integrated circuit die in the underlying integrated circuit package. This assembly introduces undesirable assembly steps and testing steps. It is desired that assembly of the complete package including a fiber optic connector be performed in a single controlled environment.
Not only is the assembly process complex, but the bond balls and posts used to connect the integrated circuit die to the optoelectronic die are large in comparison to the size of transistors and conductor lines on the integrated circuit die. Running high speed signals over the large bond balls and posts results in increased power consumption.
An improved package is desired.